In US 2012/0025261 A1 a method for the manufacturing of an insulated gate bipolar transistor (IGBT) is described. The method starts with a lowly or non doped substrate, which may be of n-type or p-type. The doping concentration of this layer with its value of less than 1*1015 cm−3 is at maximum in the order of the doping concentration of the drift layer so that this layer does not contribute much charge to a p collector layer. On this substrate an n doped buffer layer is epitaxially grown with a thickness of 5 to 10 μm followed by another epitaxial growth for the creation of an (n−) doped drift layer. Afterwards a p doped base layer together with an (n+) doped emitter layer are created on the drift layer. On the same side, a gate electrode is then made. Now the substrate is thinned on the side opposite to the first epitaxial layer so that a thin lowly or non doped layer remains. On this layer a p ions are implanted and diffused in order to form the collector layer.
This method uses a substrate which does not fulfil any function in the finalized device so that for each layer at least one manufacturing step is needed. The device is thicker than electrically needed because of the remaining low doped or non doped part of the substrate. The collector layer is made at a late stage of the manufacturing and with the thinned substrate, which means that the emitter sided layer are exposed to the high temperature used for the diffusion of the collector layer and the thinned substrate is fragile to handle.
JP 2006-086423 A shows a manufacturing method for an IGBT, in which a highly doped p+ substrate having a doping concentration of 1*1018 cm−3 is provided. On the substrate, an n+ doped buffer layer having a thickness of 5 μm is epitaxially grown. This layer has a constant high doping concentration in the depth direction, which is the same doping concentration as the substrate. The layer thickness and doping of such pure epitaxial layer is difficult to control. Due to the high doping concentration of buffer and collector layers, the collector injection efficiency is very high which leads to high injection of holes into the drift layer. The turn-off of the device is slow because of the high amount of stored charge in the drift layer and low injection of electrons into the collector layer. US 2003/42525 A1 shows similar disadvantages of a purely epitaxially grown buffer layer.
U.S. Pat. No. 5,838,027 shows a method, in which a p+ substrate is provided, on which a n− lowly doped epitaxial layer is grown. In this layer, an n+ dopant is implanted and diffused. Afterwards a lowly doped n− drift layer is created on the buffer layer. Such method shows a complicated way with many manufacturing steps for the creation of the buffer layer. Due to the diffusion of the n+ dopant in the n− layer, at the junction to the collector layer, the buffer layer has a low doping concentration, rising to its maximum doping concentration at a greater depth and again decreasing to the doping concentration of the n− drift layer, thereby increasing the total thickness of the semiconductor.